In a non-volatile memory, for example a Phase Change Memory (PCM), memory cells of the PCM may typically be set to a first threshold voltage or a second threshold voltage, depending on the data being stored in the memory cell. For example, the first threshold voltage may correspond to a first state (e.g., SET state) of the memory cell, and the second threshold voltage may correspond to a second state (e.g., RESET state) of the memory cell. In order to identify which of the two states the memory cell is in, a read voltage may be applied to the memory cell, and compared to the threshold voltage of the memory cell. Based on that comparison, the state of the memory cell may be identified.
PCM is a memory device which typically uses a chalcogenide material for its memory elements. Chalcogenide based devices and Chalcogenide like devices are affected by shift of the threshold voltage over-time. For example, once a programming pulse (e.g., a write pulse) is applied to the chalcogenide based memory (e.g., a PCM), its threshold voltage may shift, a phenomenon referred to as “drift.” Drift negatively affects the memory read margin because the drift (e.g., an increase in the threshold voltage) shifts the optimum read voltage. In some cases, the threshold voltage may increase above the maximum voltage that can be applied to the memory, which makes reading from the memory a challenge.
Drift may also prevent realization of multi-level threshold memory. In a multi-level threshold memory, data is stored at different threshold voltage levels in the memory cell. A shift in the threshold voltages makes a multi-level (or multi-threshold) memory all but useless. One reason for that is the read voltages required to read data from the different threshold voltage levels are not known with high confidence.